14nm Metal Gate Film Stack Development and Challenges

14NM METAL GATE FILM STACK DEVELOPMENT AND CHALLENGES

Jianhua Xu*, Anni Wang, Jun He, Xuezhen Jing, Ziying Zhang, Beichao Zhang

122122

2016-09-26

1.Semiconductor Manufacturing International Corporation (SMIC)

2. SMIC Advanced Technology R&D (Shanghai) Corporation

18, Zhangjiang Road, Pudong New Area, 201203 Shanghai, P. R. China

*Correspondent author E-mail:Jianhua_Xu@

ABSTRACT

As IC technology advances to 16/14 nm and beyond,

FinFET architecture with advantage of excellent leakage

performance becomes main stream in IC industry. However, it

also brings big challenges for integration and process due to

its very aggressive structure and profile, CD shrinkage, shadow

effect and gap-fill difficulty.

In this work, atomic layer deposition (ALD) metal films,

including TaN, TiN (TiSiN), TiAl and CVD W, were studied

for replacement metal gate application. Challenges of step

coverage & gap-fill, loading effect and tunable range of work

function will be discusd and addresd. Thickness of high K

capping layer (TiN or TaN), work function metal (TiN & TiAl),

W barrier layer (TiN) all show strong effect on N/P MOS

device Vt, and more than 300 mv tunable range of work

function can be achieved. Besides, higher Al : Ti ratio process,

interfacial special treatment between TiAl & W barrier TiN and

different W process can lower down NMOS Vt. At the last,

ALD and CVD process ensure good gap-fill performance when

CD opening is larger than 5nm (aspect ratio is about 20:1).

Keywords: 14nm; FinFET; Replacement metal gate;

Work function; High K capping layer; Barrier layer; ALD;

TiN; TiAl; TaN; W

INTRODUCTION

As IC technology advances to 16/14 nm and beyond,

FinFET architecture with advantage of excellent leakage

performance becomes mainstream in IC industry. However, it

also brings big challenges for integration and process due to

its very aggressive structure and profile, CD shrinkage, shadow

effect and gap-fill difficulty. Replacement high-K & metal gate

process has been inherited from 28nm generation [1-3].

Comparing with traditional poly silicon gate device, high-K

metal gate device can get higher performance and lower

leakage. High-K gate dielectric can help to reduce gate leakage

and continue scaling down Tox. Meanwhile, metal gate is

needed to replace poly silicon gate, to improve electron

mobility which is degraded by soft optical phonons scattering,

and to solve electron depletion Vt shift issue which is induced

by Fermi level pinning [4-5].

In this work, atomic layer deposition (ALD) metal films,

including TaN, TiN (TiSiN), TiAl and CVD W, were studied

for replacement metal gate application. Challenges of step

coverage & gap-fill, loading effect and tunable range of work

function will be discusd and addresd. Thickness of high K

capping layer (TiN or TaN), work function metal (TiN &

TiAl), W barrier layer (TiN) all show strong effect on N/P

MOS device Vt, and about 300 mv tunable range of work

function can be achieved. Besides, higher Al : Ti ratio process,

interfacial special treatment (IST) between TiAl & W barrier

TiN and different W process can lower down NMOS Vt. At the

last, ALD and CVD process ensure good gap-fill performance

when CD opening is larger than 5nm (aspect ratio is about

20:1).

EXPERIMENT AND DISCUSSION

1. ALD TiN, TaN & Multi-Vt

Beyond 14nm, FinFET architecture and HK last gate last

approach becomes main stream in industry. It brings big

challenges for integration and process due to its very

aggressive structure. For example, shadow effect (Fig.1) will

riously restrict tilt angle of SRAM implantation, thus it is

very difficult for Vt tuning and multi-Vt device fabrication.

Fig. 1 diagram of

shadow effect

ALD TiN is widely ud as a robust HK capping layer, due

to its good barrier characteristic, process controllability and

excellent step coverage. Besides, work function of ALD TiN is

clo to 5 eV, so different thickness of ALD TiN capping layer

can be designed to adjust multi-Vt, according to device

requirement. As an optional choice, ALD TaN with middle gap

work function, also can be adopted together with ALD TiN, to

act as etch stop layer and adjust Vt.

Herein, the effect of TiN and TaN thickness on work

function tuning was studied by MOSCAP C-V test, and the

results have shown in Fig 2. The detailed MOSCAP structure

and process have been reported in our previous work [6].As

shown in Fig 2(a), work function value is increasing when the

TiN thickness varies from YA to (Y+15)A. Meanwhile, the

same trend has been obrved in Fig. 2(b), i.e. work function deposition. In our previously work, we have reported the

shift toward a higher value with the TaN thickness increasing. comparison of barrier capability for TiN and TiSiN [6]. Herein,

Compared with Fig. 2(a) and Fig. 2(b), TaN thickness is more we will further study barrier capability of TiN film by TiN

nsitive for work function. TiN thickness enhanced 1A will thickness tuning on n-type FinFET device.

increa work function 4mV, while TaN thickness enhanced Fig. 4(a) shows the Vt data on different barrier layer TiN

1A will increa work function 15mV. thickness. Obviously, thicker TiN film will result in NMOS Vt

degraded more than 100mV. One suspected model for thicker

Fig. 2 (a) WF vs. TiN thickness, (b) WF vs. TaN thickness

As mentioned previously, work function of ALD TiN is

clo to 5 eV, and ALD TaN has a middle gap work function.

Thus, both increasing the TiN/TaN thickness can enhance the

work function shift toward valence band, i.e. the value of work

function enhanced. The results indicate that the work

function of metal gate can be tuned by changing HK capping

layer TiN and TaN thickness. For P metal gate, the work

function of metal layer is required to be tuned toward 5 eV,

which can be achieved by increasing the TiN/TaN thickness.

For N metal gate, the work function of metal layer is required to

be tuned toward 4.1 eV, a thinner TiN/TaN HK capping layer

can be realized bad on above data. Hence, it is a potential

method that multi Vt can be adjusted by tuning HK capping

layer TiN/TaN thickness.

2. TiAl thickness and Al/Ti ratio

N metal work function tuning is one of the greatest

challenges in 14nm N-type FinFET device, which will affect

device Vt. TiAl film as a typical n-type work function layer has

been ud in HKMG device. The TiAl thickness and Al/Ti ratio

are nsitive for N metal work function. The relationship

between TiAl thickness and N metal work function is illustrated

in Fig. 3(a). The work function is decreasing regularly when

TiAl film becomes thicker. Furthermore, Fig. 3(b) also

illustrates the influence on Al/Ti ratio for N metal work

function. It can be obvious that the work function shift toward

lower direction as the Al concentration become richer. As

discusd above, TiAl as n-type work function layer, its

thickness and element ratio will affect the N metal work

function.

Fig. 3(a) WF vs. TiAl thickness, (b) WF vs. Al/Ti ratio

3. W barrier TiN

As we known that a barrier layer in HKMG device is very

important, this barrier layer will help to prevent impurities (for

example: F or B) diffusion. F and B element root in W

TiN can reduces NMOS Vt is that thicker TiN film has a better

barrier capability (Fig. 5). As we mentioned above, TiN as a

barrier layer aim to prevent impurities (for example: F or B)

diffusion. F and B as mobilizable ions pass through barrier

layer into work function layer which resulting in metal work

function shift. Thus, the thicker TiN barrier layer can improve

impurities diffusion.

Fig. 4(a) Vt vs. Barrier TiN thickness, (b) Vt vs. TiAl IST

Fig. 5 One Suspected model for thicker TiN can reduces

NMOS Vt

To verify this model, two different film stack are prepared,

A is HK/cap layer/TiAl/TiN(thin)/W, B is HK/ cap layer

/TiAl/TiN(thick)/W. The analysis for element in depth profile

is carried out by backside SIMS. From data prented in Fig. 6,

it can be obvious en that F diffusion is reduced in thicker TiN

film stack while the distribution of B is the same in two film

stack. It means that F diffusion is nsitive to induce Vt shift

and thicker TiN barrier layer can block F diffusion.

Fig. 6 SIMS depth profile of different TiN thickness

Enhanced barrier TiN thickness is a feasible method to

reduce NMOS Vt. However, TiN become thicker will affect W

gap fill due to the shrinking of gap fill trench. Another potential

method to improve F diffusion is that adding an IST process

after TiAl deposition. An IST process can form an special

interfacial layer on TiAl. This interfacial layer also can act as a

barrier layer to block F diffusion. Fig. 4(b) shows the influence ensure good metal gate gap-fill performance and step coverage.

of TiAl IST on NMOS Vt. The results show that both IST-A

and IST-B can degrade Vt more than 80 mV. One of the major

concerns for adding IST is barrier layer TiN step coverage and

metal electrode W gap fill. A special interfacial layer may

affect the TiN adhesion on TiAl film, and further influence the

capability of W gap fill performance. Fig. 7 shows the TEM

cross ction image of N metal gate with TiAl IST. A good W

gap fill performance can be obvious when CD opening is larger

than 5nm (aspect ratio is about 20:1), and each film has a good

step coverage and uniformity. Further, the different W

deposition process will also result in Vt shift in our study. Fig. 8

shows the Vt data for two different W deposition process which

exist about 100 mV gap. The detailed effect mechanism for

the two type process will be studied in our further work. It is

worth noting that previous data shown in this paper are in type

A condition for W deposition.

Bad on above discussion, enhanced barrier TiN

thickness and adding an IST process after TiAl deposition are

potential method for N metal gate integration to achieve Vt

target. Different W deposition condition also can make Vt

down. Furthermore, a good W gap fill performance is ensured

due to the fact that ALD and CVD process are ud in the whole

metal gate process tuning.

7-(a) multi Fin metal gate 7-(b) 20:1 aspect ratio gap fill

Fig. 7 TEM cross ction image

Fig. 8 Vt vs. different W deposition process

CONCLUSION

In this work, Challenges of step coverage & gap-fill,

loading effect and tunable range of work function are discusd

and addresd. Multi Vt can be adjusted by tuning HK capping

layer TiN/TaN thickness. TiAl as n-type work function layer,

its thickness and element ratio are nsitive on N metal work

function. Enhanced the thickness of W barrier TiN film can

degrade NMOS Vt due to the fact that thicker barrier layer can

block F diffusion. Another method to decrea NMOS vt is

adding an IST process between TiAl and W barrier TiN.

Furthermore, we find that different W deposition process will

also affect Vt shifting. At the last, ALD and CVD process

ACKNOWLEDGEMENTS

The author would like to acknowledge all team members

of SMIC TD TF for the instructions and help.

REFERENCES

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[4] E. Jos et al., IEDM Tech. Dig., 1999, pp. 661–664.

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[6] J. H. Xu et al., 2016 China Semiconductor Technology

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